? semiconductor components industries, llc, 2011 january, 2011 ? rev. 3 1 publication order number: nttfs4824n/d nttfs4824n power mosfet 30 v, 69 a, single n ? channel, 8fl features ? small footprint (3.3 x 3.3 mm) for compact design ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? dc ? dc converters ? low side switching maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss 30 v gate ? to ? source voltage v gs 20 v continuous drain current r ja (note 1) steady state t a = 25 c i d 14.9 a t a = 85 c 10.8 power dissipation r ja (note 1) t a = 25 c p d 2.2 w continuous drain current r ja 10 s (note 1) t a = 25 c i d 20.6 a t a = 85 c 14.9 power dissipation r ja 10 s (note 1) t a = 25 c p d 4.1 w continuous drain current r ja (note 2) t c = 25 c i d 8.3 a t c = 85 c 6.0 power dissipation r ja (note 2) t c = 25 c p d 0.66 w continuous drain current r jc (note 1) t c = 25 c i d 69 a t c = 85 c 50 power dissipation r jc (note 1) t c = 25 c p d 46.3 w pulsed drain current t a = 25 c, t p = 10 s i dm 207 a operating junction and storage temperature t j , t stg ? 55 to +150 c source current (body diode) i s 46.3 a drain to source dv/dt dv/dt 6.0 v/ns single pulse drain ? to ? source avalanche energy (t j = 25 c, v dd = 50 v, v gs = 10 v, i l = 38 a pk , l = 0.1 mh, r g = 25 ) e as 72 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface ? mounted on fr4 board using 1 sq ? in pad, 1 oz cu. 2. surface ? mounted on fr4 board using the minimum recommended pad size. ordering information http://onsemi.com device package shipping ? v (br)dss r ds(on) max i d max 30 v 5.0 m @ 10 v 69 a n ? channel mosfet d (5 ? 8) s (1,2,3) g (4) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. wdfn8 ( 8fl) case 511ab flat lead marking diagram 7.5 m @ 4.5 v NTTFS4824NTAG wdfn8 (pb ? free) 1500/tape & reel (note: microdot may be in either location) 1 4824 = specific device code a = assembly location y = year ww = work week = pb ? free package 1 nttfs4824ntwg wdfn8 (pb ? free) 5000/tape & reel 4824 ayww d d d d s s s g
nttfs4824n http://onsemi.com 2 thermal resistance maximum ratings parameter symbol value unit junction ? to ? case (drain) r jc 2.7 c/w junction ? to ? ambient ? steady state (note 3) r ja 57.7 junction ? to ? ambient ? steady state (note 4) r ja 187.8 junction ? to ? ambient ? (t 10 s) (note 3) r ja 30.3 3. surface ? mounted on fr4 board using 1 sq ? in pad, 1 oz cu. 4. surface ? mounted on fr4 board using the minimum recommended pad size. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 25 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1.0 a t j = 125 c 10 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.5 1.9 2.5 v negative threshold temperature coefficient v gs(th) /t j 6 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v to 11.5 v i d = 20 a 3.7 5.0 m i d = 10 a 3.6 v gs = 4.5 v i d = 20 a 5.8 7.5 i d = 10 a 5.7 forward transconductance g fs v ds = 1.5 v, i d = 20 a 53 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 12 v 1750 2363 pf output capacitance c oss 350 473 reverse transfer capacitance c rss 170 255 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v, i d = 20 a 12.6 18 nc threshold gate charge q g(th) 1.7 gate ? to ? source charge q gs 4.7 gate ? to ? drain charge q gd 4.8 total gate charge q g(tot) v gs = 11.5 v, v ds = 15 v, i d = 20 a 29 nc switching characteristics (note 6) turn ? on delay time t d(on) v gs = 4.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 13 ns rise time t r 38 turn ? off delay time t d(off) 18 fall time t f 5.5 5. pulse test: pulse width = 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
nttfs4824n http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol switching characteristics (note 6) turn ? on delay time t d(on) v gs = 11.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 9.0 ns rise time t r 21 turn ? off delay time t d(off) 25 fall time t f 4.4 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 20 a t j = 25 c 0.8 1.0 v t j = 125 c 0.7 reverse recovery time t rr v gs = 0 v, d is /d t = 100 a/ s, i s = 20 a 22 ns charge time t a 10.5 discharge time t b 11.5 reverse recovery charge q rr 10 nc package parasitic values source inductance l s t a = 25 c 0.38 nh drain inductance l d 0.054 gate inductance l g 1.3 gate resistance r g 0.9 2.0 5. pulse test: pulse width = 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
nttfs4824n http://onsemi.com 4 typical characteristics 0 10 20 30 40 50 60 70 80 90 012345 0.5 figure 1. on ? region characteristics v ds , drain ? to ? source voltage (v) i d , drain current (a) 10 v t j = 25 c v gs = 4.5 v 5.0 v 4.0 v 3.8 v 3.6 v 3.4 v 3.2 v 4.2 v 0 25 50 75 100 125 23456 i d , drain current (a) figure 2. transfer characteristics v gs , gate ? to ? source voltage (v) v ds 10 v t j = 25 c t j = 100 c t j = ? 55 c 0.002 0.003 0.004 346810 figure 3. on ? resistance vs. gate ? to ? source voltage v gs , gate ? to ? source voltage (v) i d = 20 a t j = 25 c r ds(on) , drain ? to ? source resistance ( ) 0.002 0.003 0.004 0.005 0.006 0.007 0.008 50 60 70 80 90 100 110 120 figure 4. on ? resistance vs. drain current and gate voltage i d , drain current (a) r ds(on) , drain ? to ? source resistance ( ) v gs = 4.5 v v gs = 10 v t j = 25 c 0.6 0.8 1 1.2 1.4 1.6 1.8 ? 50 ? 25 0 25 50 75 100 125 150 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) r ds(on) , drain ? to ? source resistance (normalized) i d = 20 a v gs = 10 v 10 100 1000 10000 5 1015202530 figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (v) i dss , leakage (na) t j = 150 c v gs = 0 v t j = 125 c 7.0 v 0.005 0.006 0.007 0.008 0.009 0.010 579 100 110 120 130 1.5 2.5 3.5 4.5 0.009 0.010 20 30 40 0.5 0.7 0.9 1.1 1.3 1.5 1.7
nttfs4824n http://onsemi.com 5 typical characteristics 0 1000 3000 0 5 10 15 20 25 30 figure 7. capacitance variation gate ? to ? source or drain ? to ? source voltage (v) c, capacitance (pf) v gs = 0 v t j = 25 c c oss c iss c rss 0 2 4 6 8 10 12 04812162024 figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge q g , total gate charge (nc) v gs , gate ? to ? source voltage (v) i d = 20 a t j = 25 c qt v gs q gd q gs 1 10 100 1000 1 10 100 figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) t, time (ns) v dd = 15 v i d = 15 a v gs = 10 v t f t r t d(off) t d(on) 0 5 10 15 20 25 30 0.4 0.5 0.6 0.7 0.8 0.9 1 figure 10. diode forward voltage vs. current v sd , source ? to ? drain voltage (v) i s , source current (a) v gs = 0 v t j = 25 c 0.01 1 10 100 1000 0.1 1 10 100 figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (v) i d , drain current (a) 10 s 100 s 1 ms 10 ms dc v gs = 20 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 0 25 50 75 25 50 75 100 125 150 figure 12. maximum avalanche energy vs. starting junction temperature t j , starting junction temperature( c) e as , single pulse drain ? to ? source avalanche energy (mj) i d = 38 a 0.1 2000 28 32
nttfs4824n http://onsemi.com 6 package dimensions wdfn8 3.3x3.3, 0.65p case 511ab ? 01 issue b *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.65 0.42 0.75 2.30 3.46 package 8x pitch 3.60 0.57 0.47 outline dimension: millimeters 2.37 0.66 4x m 1.40 1.50 0 ??? 1.60 12 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension d1 and e1 do not include mold flash protrusions or gate burrs. 1234 5 6 top view side view bottom view d1 e1 d e b a 0.20 c 0.20 c 2x 2x dim min nom millimeters a 0.70 0.75 a1 0.00 ??? b 0.23 0.30 c 0.15 0.20 d d1 2.95 3.05 d2 1.98 2.11 e e1 2.95 3.05 e2 1.47 1.60 e 0.65 bsc g 0.30 0.41 k 0.64 ??? l 0.30 0.43 l1 0.06 0.13 a 0.10 c 0.10 c detail a 14 8 l1 e/2 8x d2 g e2 k b a 0.10 b c 0.05 c l detail a a1 e 6x c 4x c seating plane 5 max 0.80 0.05 0.40 0.25 3.15 2.24 3.15 1.73 0.51 ??? 0.56 0.20 m 0.055 0.059 0 ??? 0.063 12 0.028 0.030 0.000 ??? 0.009 0.012 0.006 0.008 0.116 0.120 0.078 0.083 0.116 0.120 0.058 0.063 0.026 bsc 0.012 0.016 0.025 ??? 0.012 0.017 0.002 0.005 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.020 ??? 0.022 0.008 min nom inches max 7 8 3.30 bsc 3.30 bsc 0.130 bsc 0.130 bsc on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. nttfs4824n/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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